An important stage in the fabrication of semiconductor devices is ensuring that a device is behaving as designed. This stage, known as “test,” is often performed using automatic test equipment, or “testers,” which analyze the behavior of the device automatically. Such automatic test equipment comprise complex electronics capable of sending test signals to, and measuring values of test signals from, one or more test points on one or more devices under test (DUTs).
To fully test a device, a tester must generate and measure signals such as those that may be found in the operating environment of the DUT. For some tests, the operations performed in the tester to generate or measure a test signal are defined by a test pattern. In operation, circuitry inside the tester, called a “pattern generator,” may execute the pattern. The test pattern may specify, for each of numerous tester cycles, what signals to send to, or that are expected to be measured at, each of numerous test points on the DUT. The signals measured by the tester provide an indication of test results, that is, whether the DUT is behaving as designed.
For a tester to properly evaluate test results on a semiconductor device, it is often necessary for the tester to determine both that a specific signal was detected and that the signal occurred at a specific time. Testers may include “pin electronics” circuitry that determines whether signals measured at the DUT have expected values at expected times. To signal to other components the results of these comparisons, the pin electronics may set flags. The flags are propagated through the tester and portions of the tester may take actions based on the flags. For example, subsequent generated and/or measured signals may be based on one or more flags.
However, a tester may comprise multiple components, each of which may play a role generating or measuring signals, or both. For example, it may be convenient for a tester to comprise a number of modules to aid upgrades and/or repairs, or to allow adaptation of the tester to the test of a particular semiconductor device. In order for generated and measured signals to be based on the flag, the flag needs to be applied throughout the tester to reach multiple components with a specific time relationship.
For example, when a flag is set in a cycle of tester operation to indicate that the DUT is not behaving as designed, the test system may adapt subsequent testing operations based on this test failure. In order for the test system to perform tests efficiently, the tester may also need to coordinate subsequent actions amongst its components promptly after the test signal is generated. For example, upon detecting that a DUT being tested has failed a test, the components of the tester involved in that test may cease operations to test that DUT, already known to have failed, and reset for testing another DUT. Though, these actions must be coordinated so that the components all generate and measure signals for testing the next DUT at a coordinated time.
One way to coordinate components is to provide centralized circuitry that is connected through point to point wiring to all of the components to provide a reference clock and exchange flags with all components. For example, each pattern generator could operate synchronously based on the reference clock signal provided by the centralized circuitry. When a flag is set in one component, the signal may be communicated from the component to the centralized circuitry, which then communicates commands to all of the pattern generators. However, there may be practical constraints on the number of physical connections that can be made between components in the testing system.